Metal–nitride–oxide–semiconductor transistor

The metal–nitride–oxide–semiconductor or metal–nitride–oxide–silicon (MNOS) transistor is a type of MOSFET (metal–oxide–semiconductor field-effect transistor) in which the oxide layer is replaced by a double layer of nitride and oxide.[1] It is an alternative and supplement to the existing standard MOS technology, wherein the insulation employed is a nitride-oxide layer.[2][3] It is used in non-volatile computer memory.[4]

History

The first silicon dioxide transistors were developed by Frosch and Derick in 1957 at Bell Labs.[5]

In late 1967, a Sperry research team led by H.A. Richard Wegener invented the metal–nitride–oxide–semiconductor (MNOS) transistor,[6] a type of MOSFET in which the oxide layer is replaced by a double layer of nitride and oxide.[1] Nitride was used as a trapping layer instead of a floating gate, but its use was limited as it was considered inferior to a floating gate.[7]

Charge trap (CT) memory was introduced with MNOS devices in the late 1960s. It had a device structure and operating principles similar to floating-gate (FG) memory, but the main difference is that the charges are stored in a conducting material (typically a doped polysilicon layer) in FG memory, whereas CT memory stored charges in localized traps within a dielectric layer (typically made of silicon nitride).[8]

See also

  • Field-effect transistor
  • MISFET
  • MOSFET
  • SONOS

References

  1. ^ a b Brodie, Ivor; Muray, Julius J. (2013). The Physics of Microfabrication. Springer Science & Business Media. p. 74. ISBN 9781489921604.
  2. ^ Frohman-Bentchkowsky, D. (1970). "The metal-nitride-oxide-silicon (MNOS) transistor—Characteristics and applications". Proceedings of the IEEE. 58 (8): 1207–1219. doi:10.1109/PROC.1970.7897.
  3. ^ "Metal–nitride–oxide–semiconductor (MNOS) technology". JEDEC.
  4. ^ Ng, Kwok K. (2010). "Metal-Nitride-Oxide Semiconductor Transistor". Complete Guide to Semiconductor Devices. John Wiley & Sons, Inc. pp. 353–360. doi:10.1002/9781118014769.ch47. ISBN 9781118014769.
  5. ^ Frosch, C. J.; Derick, L (1957). "Surface Protection and Selective Masking during Diffusion in Silicon". Journal of The Electrochemical Society. 104 (9): 547. doi:10.1149/1.2428650.
  6. ^ Wegener, H. A. R.; Lincoln, A. J.; Pao, H. C.; O'Connell, M. R.; Oleksiak, R. E.; Lawrence, H. (October 1967). The variable threshold transistor, a new electrically-alterable, non-destructive read-only storage device. 1967 International Electron Devices Meeting. Vol. 13. p. 70. doi:10.1109/IEDM.1967.187833.
  7. ^ Prall, Kirk; Ramaswamy, Nirmal; Goda, Akira (2015). "Chapter 2: A Synopsis on the State of the Art of NAND Memories". Charge-Trapping Non-Volatile Memories: Volume 1 – Basic and Advanced Devices. Springer. pp. 37–64 (39). ISBN 9783319152905.
  8. ^ Ioannou-Soufleridis, V.; Dimitrakis, Panagiotis; Normand, Pascal (2015). "Chapter 3: Charge-Trap Memories with Ion Beam Modified ONO Stracks". Charge-Trapping Non-Volatile Memories: Volume 1 – Basic and Advanced Devices. Springer. pp. 65–102 (65). ISBN 9783319152905.


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